The need often arises in integrated circuits (ICs) to electrically isolate various regions from one another. At the digital device level, a number of techniques are known and used to produce this electrical isolation, such as LOCOS (local oxidation of silicon) and STI (shallow trench isolation). These techniques insure good electrical isolation of various regions from one another but undesirably require time consuming processing operations and consume significant real estate on the wafer surface. Another shortcoming of these techniques is that they are useful only for regions that are relatively close to the wafer surface. There are a number of situations, however, where the isolating region must extend to a significant depth below the wafer surface. In some cases, the isolating region must extend completely through to the opposed surface of the wafer. Examples that require deep substrate isolation regions include reduction of substrate noise coupling, realization of high Q inductors on silicon mixed mode ICs, reduction of transmission line loss for high frequency ICs, and the separation of different types of devices such as analog from digital or bipolar from CMOS on the same substrate.
One method for forming electrically isolating regions in silicon and other conventionally used semiconductor substrates, includes implanting charged particles such as protons, into the semiconductor substrate to convert the semiconductor substrate to a semi-insulating or high-resistance region. There are some known methods for implanting protons deep into the semiconductor substrates to form electrically isolating regions, but these techniques utilize a further mask that must be positioned above the surface of the substrate and aligned with great precision to the structures formed on a substrate. This procedure is cumbersome and time consuming. In some cases, to improve alignment precision, the further mask such as a Si-mask-wafer, is physically attached to the substrate upon which the IC is being fabricated. Physically contacting the mask to the substrate may scratch and damage the surface of the substrate causing yield reduction and device failure.
It would therefore be desirable to provide a method for forming deep electrically isolating areas in a semiconductor substrate sufficient to accommodate the aforementioned needs, and without having to align a remote mask with the substrate or contacting the further mask to the substrate and damaging the surface.